Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7600
-gerrit
commit 52c1c435d33c0901f73406dcdb8cf4dbf6f3193f Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Fri Nov 21 08:40:55 2014 +0200
AGESA Hudson/Yangtze: Remove unused GPP configuration in devicetree
GPP config from devicetree.cb is not implemented for fam15tn/fam16kb.
Also only for asus/f2a85-m the configuration value matched the actual programming.
Change-Id: Ic7a9aa1360f4ba35d202f3f7dd1fc3c20a52dde0 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/mainboard/amd/parmer/devicetree.cb | 1 - src/mainboard/amd/thatcher/devicetree.cb | 1 - src/mainboard/asus/f2a85-m/devicetree.cb | 1 - src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb | 1 - src/mainboard/lenovo/g505s/devicetree.cb | 1 - src/southbridge/amd/agesa/hudson/chip.h | 1 - 6 files changed, 6 deletions(-)
diff --git a/src/mainboard/amd/parmer/devicetree.cb b/src/mainboard/amd/parmer/devicetree.cb index b63ba12..b37691c 100644 --- a/src/mainboard/amd/parmer/devicetree.cb +++ b/src/mainboard/amd/parmer/devicetree.cb @@ -68,7 +68,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson
device pci 18.0 on end diff --git a/src/mainboard/amd/thatcher/devicetree.cb b/src/mainboard/amd/thatcher/devicetree.cb index 5fc4648..25210ba 100644 --- a/src/mainboard/amd/thatcher/devicetree.cb +++ b/src/mainboard/amd/thatcher/devicetree.cb @@ -83,7 +83,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson
device pci 18.0 on end diff --git a/src/mainboard/asus/f2a85-m/devicetree.cb b/src/mainboard/asus/f2a85-m/devicetree.cb index 5158f19..b08a63d 100644 --- a/src/mainboard/asus/f2a85-m/devicetree.cb +++ b/src/mainboard/asus/f2a85-m/devicetree.cb @@ -116,7 +116,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.2 off end # unused device pci 15.3 off end # unused
- register "gpp_configuration" = "4" end #chip southbridge/amd/hudson
device pci 18.0 on end diff --git a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb index 895437b..2791262 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb +++ b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb @@ -68,7 +68,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson
device pci 18.0 on end diff --git a/src/mainboard/lenovo/g505s/devicetree.cb b/src/mainboard/lenovo/g505s/devicetree.cb index 3a518ab..e9718ba 100644 --- a/src/mainboard/lenovo/g505s/devicetree.cb +++ b/src/mainboard/lenovo/g505s/devicetree.cb @@ -72,7 +72,6 @@ chip northbridge/amd/agesa/family15rl/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson
device pci 18.0 on end diff --git a/src/southbridge/amd/agesa/hudson/chip.h b/src/southbridge/amd/agesa/hudson/chip.h index 21b8cd2..4a832ff 100644 --- a/src/southbridge/amd/agesa/hudson/chip.h +++ b/src/southbridge/amd/agesa/hudson/chip.h @@ -22,7 +22,6 @@
struct southbridge_amd_agesa_hudson_config { - u8 gpp_configuration; u8 sd_mode; };