Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40322 )
Change subject: soc/amd/picasso: Clean up legacy UART config ......................................................................
Patch Set 7: Code-Review+2
Patch Set 7:
Patch Set 7:
the remaining thing I'm not sure about is if the ACPI entries for the MMIO UARTs should be hidden when PICASSO_UART_LEGACY is set, so that the same UARTs won't get exposed to the OS twice. If a SoC serial port is used as console, it'll still use the MMIO interface, but that is no issue there
I suspect resources should become reserved instead of part of an AMD0020 device. Existing content LGTM.
Let's worry about ACPI details later. I think the whole reason we wanted the legacy addresses supported was for niche environments that didn't support the MMIO UARTs. So I'm not sure the ACPI will be important there anyway. And AFAIK the UARTs are still accessible w/MMIO, so describing them may still be the right thing to do.