[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add DDR5 and LPDDR5 into the SMBIOS table

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58576 )

Change subject: soc/intel/common: Add DDR5 and LPDDR5 into the SMBIOS table
......................................................................

soc/intel/common: Add DDR5 and LPDDR5 into the SMBIOS table

Add DDR5 and LPDDR5 memory technology into the SMBIOS Memory Type
table.

Change-Id: I1ec442cf0bd830db99e3636445724b6be01c5564
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58576
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
---
M src/include/smbios.h
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/include/smbios.h b/src/include/smbios.h
index 2fb6297..c11fc6c 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -192,6 +192,8 @@
    MEMORY_TYPE_LOGICAL_NON_VOLATILE_DEVICE = 0x1f,
    MEMORY_TYPE_HBM = 0x20,
    MEMORY_TYPE_HBM2 = 0x21,
+	MEMORY_TYPE_DDR5 = 0x22,
+	MEMORY_TYPE_LPDDR5 = 0x23,
 } smbios_memory_type;

typedef enum {