Yanjie Jiang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32666
Change subject: coreboot: add md power off flow ......................................................................
coreboot: add md power off flow
Change-Id: Ib6e11faeb6936a1dd6bbe8b1a8b612446bf51082 --- M src/soc/mediatek/mt8183/Makefile.inc A src/soc/mediatek/mt8183/include/soc/md_ctrl.h A src/soc/mediatek/mt8183/md_ctrl.c M src/soc/mediatek/mt8183/mt8183.c 4 files changed, 67 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/32666/1
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc old mode 100644 new mode 100755 index 5392a9e..ca7d521 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -9,6 +9,7 @@ bootblock-y += ../common/timer.c bootblock-y += ../common/uart.c bootblock-y += ../common/wdt.c +bootblock-y += md_ctrl.c
decompressor-y += decompressor.c decompressor-y += ../common/mmu_operations.c @@ -21,6 +22,7 @@ verstage-y += ../common/timer.c verstage-y += ../common/uart.c verstage-y += ../common/wdt.c +verstage-y += md_ctrl.c
romstage-y += auxadc.c romstage-y += ../common/cbmem.c emi.c @@ -39,6 +41,7 @@ romstage-y += ../common/timer.c romstage-y += ../common/uart.c romstage-y += ../common/wdt.c +romstage-y += md_ctrl.c
ramstage-y += auxadc.c ramstage-y += ../common/cbmem.c emi.c diff --git a/src/soc/mediatek/mt8183/include/soc/md_ctrl.h b/src/soc/mediatek/mt8183/include/soc/md_ctrl.h new file mode 100755 index 0000000..534de9b --- /dev/null +++ b/src/soc/mediatek/mt8183/include/soc/md_ctrl.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2019 MediaTek Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MEDIATEK_MD_POWER_H__ +#define __SOC_MEDIATEK_MD_POWER_H__ + +void mtk_md_early_init(void); + +#endif \ No newline at end of file diff --git a/src/soc/mediatek/mt8183/md_ctrl.c b/src/soc/mediatek/mt8183/md_ctrl.c new file mode 100755 index 0000000..c8acb1f --- /dev/null +++ b/src/soc/mediatek/mt8183/md_ctrl.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2019 MediaTek Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/mmio.h> +#include <console/console.h> +#include <soc/addressmap.h> +#include <soc/infracfg.h> +#include <soc/pll.h> +#include <soc/md_ctrl.h> + +static void internal_md1_power_down(void) +{ + unsigned int reg_value; + + /* 1. md clock setting: gating */ + reg_value = read32(&mtk_topckgen->clk_mode); + reg_value |= ((1<<8)|(1<<9)); + write32(&mtk_topckgen->clk_mode, reg_value); + + /* 2. mixedsys topsm init, for release srcclkena in kernel */ + reg_value = read32(&mt8183_infracfg->infra_misc2); + reg_value &= ~0xFF; + write32(&mt8183_infracfg->infra_misc2, reg_value); + + printk(BIOS_INFO, "[ccci-off]src clk ena = 0x%X\n", + read32(&mt8183_infracfg->infra_misc2)); +} + +void mtk_md_early_init(void) +{ + internal_md1_power_down(); +} + diff --git a/src/soc/mediatek/mt8183/mt8183.c b/src/soc/mediatek/mt8183/mt8183.c old mode 100644 new mode 100755 index c441980..66038e3 --- a/src/soc/mediatek/mt8183/mt8183.c +++ b/src/soc/mediatek/mt8183/mt8183.c @@ -15,8 +15,10 @@
#include <soc/mt8183.h> #include <soc/wdt.h> +#include <soc/md_ctrl.h>
void mt8183_early_init(void) { mtk_wdt_init(); + mtk_md_early_init(); }