Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39613 )
Change subject: Sc7180: Add display 10nm phy & pll programming support
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Patch Set 33:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39613/33/src/soc/qualcomm/sc7180/di...
File src/soc/qualcomm/sc7180/display/dsi_phy.c:
https://review.coreboot.org/c/coreboot/+/39613/33/src/soc/qualcomm/sc7180/di...
PS33, Line 606: vco_freq_hz = pll_output_freq_hz * pll_post_div;
Why are you calculating this when the caller only checks the result for 0? Might as well leave out this extra code and just return CB_SUCCESS/CB_ERR from here.
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