Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38268 )
Change subject: intel/x4x,i82801{ix|jx}: Move enable_smbus() call ......................................................................
intel/x4x,i82801{ix|jx}: Move enable_smbus() call
Change-Id: Idc7631abb550b31af722ccf3b69afdc01fdb616e Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/northbridge/intel/x4x/romstage.c M src/southbridge/intel/i82801ix/early_init.c M src/southbridge/intel/i82801jx/early_init.c 3 files changed, 6 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/38268/1
diff --git a/src/northbridge/intel/x4x/romstage.c b/src/northbridge/intel/x4x/romstage.c index eae87f3..26d336b 100644 --- a/src/northbridge/intel/x4x/romstage.c +++ b/src/northbridge/intel/x4x/romstage.c @@ -34,8 +34,6 @@ u8 boot_path = 0; u8 s3_resume;
- enable_smbus(); - #if CONFIG(SOUTHBRIDGE_INTEL_I82801JX) i82801jx_early_init(); #elif CONFIG(SOUTHBRIDGE_INTEL_I82801GX) diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c index 92db7d8..4ce4fbe 100644 --- a/src/southbridge/intel/i82801ix/early_init.c +++ b/src/southbridge/intel/i82801ix/early_init.c @@ -23,6 +23,9 @@ { const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
+ if (ENV_ROMSTAGE) + enable_smbus(); + /* Set up RCBA. */ pci_write_config32(d31f0, RCBA, (uintptr_t)DEFAULT_RCBA | 1);
diff --git a/src/southbridge/intel/i82801jx/early_init.c b/src/southbridge/intel/i82801jx/early_init.c index 1afc6b3..87831bb 100644 --- a/src/southbridge/intel/i82801jx/early_init.c +++ b/src/southbridge/intel/i82801jx/early_init.c @@ -81,6 +81,9 @@ { const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
+ if (ENV_ROMSTAGE) + enable_smbus(); + printk(BIOS_DEBUG, "Setting up static southbridge registers..."); i82801jx_setup_bars(); printk(BIOS_DEBUG, " done.\n");