[coreboot-gerrit] Change in coreboot[master]: Revert "soc/intel/xeon_sp: Fix devices list in the DMAR DRHD structure"

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52898 )

Change subject: Revert "soc/intel/xeon_sp: Fix devices list in the DMAR DRHD structure"
......................................................................

Revert "soc/intel/xeon_sp: Fix devices list in the DMAR DRHD structure"

This reverts commit 8122b3f6123158024ed2844af17289a9abb98036.
This broke DMAR. DRHD defines the scope of the device entries below.

Change-Id: Iac4858f774fa3811da43f7697a9392daba4b4fba
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/xeon_sp/nb_acpi.c
1 file changed, 13 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/52898/1

diff --git a/src/soc/intel/xeon_sp/nb_acpi.c b/src/soc/intel/xeon_sp/nb_acpi.c
index 3b2fba9..19c3921 100644
--- a/src/soc/intel/xeon_sp/nb_acpi.c
+++ b/src/soc/intel/xeon_sp/nb_acpi.c
@@ -198,6 +198,19 @@
    if (!reg_base)
    	return current;

+	// Add DRHD Hardware Unit
+	if (socket == 0 && stack == CSTACK) {
+		printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
+			"Register Base Address: 0x%x\n",
+			DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
+		current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
+			pcie_seg, reg_base);
+	} else {
+		printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
+			"Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
+		current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
+	}
+
    // Add PCH IOAPIC
    if (socket == 0 && stack == CSTACK) {
    	union p2sb_bdf ioapic_bdf = p2sb_get_ioapic_bdf();
@@ -263,19 +276,6 @@
    	}
    }

-	// Add DRHD Hardware Unit
-	if (socket == 0 && stack == CSTACK) {
-		printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
-			"Register Base Address: 0x%x\n",
-			DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
-		current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
-			pcie_seg, reg_base);
-	} else {
-		printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
-			"Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
-		current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
-	}
-
    acpi_dmar_drhd_fixup(tmp, current);

return current;