Jenny Tc has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29775 )
Change subject: SMI: Introduce CONFIG_SOC_INTEL_BYPASS_PORT_B2_SMI
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Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29775/1/src/ec/google/chromeec/smihandler.c
File src/ec/google/chromeec/smihandler.c:
https://review.coreboot.org/#/c/29775/1/src/ec/google/chromeec/smihandler.c@...
PS1, Line 102: #if IS_ENABLED(CONFIG_SOC_INTEL_BYPASS_PORT_B2_SMI)
You will still have to populate 0 to SMI PORT in FADT to ensure OS doesn't expose that port. […]
If CONFIG_REDUCED_SMI is enabled, https://review.coreboot.org/#/c/coreboot/+/28696/2/src/soc/intel/skylake/acp... will do populating the FADT right?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I43ca93972fa4d870632707cb9a9e74ab80cbd5d5
Gerrit-Change-Number: 29775
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