[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Clean up cannonlake_memcfg_init

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32513 )

Change subject: soc/intel/cannonlake: Clean up cannonlake_memcfg_init
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Patch Set 3:

(1 comment)

thanks for working on this, please find the inline comment

https://review.coreboot.org/#/c/32513/3/src/soc/intel/cannonlake/include/soc... 
File src/soc/intel/cannonlake/include/soc/cnl_memcfg_init.h:

https://review.coreboot.org/#/c/32513/3/src/soc/intel/cannonlake/include/soc... 
PS3, Line 62: 	struct spd_info spd;
how do you support configurations where you have one SPD in CBFS and one stored on DDR4 EEPROM?

There should be one mem_info_read_type for each slot.