[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: make satahotplug user configurable via devicetree

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42803 )

Change subject: soc/intel/cannonlake: make satahotplug user configurable via devicetree
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soc/intel/cannonlake: make satahotplug user configurable via devicetree

Hook up the FSP UPD

Change-Id: I6b479bfc83492440eac97cdc8dcc560b6abf4fdf
Signed-off-by: Jonas Loeffelholz 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42803
Reviewed-by: Christian Walter 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/fsp_params.c
2 files changed, 5 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Christian Walter: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 57922e1..2923efc 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -147,6 +147,7 @@
    uint8_t SataPortsEnable[8];
    uint8_t SataPortsDevSlp[8];
    uint8_t SataPortsDevSlpResetConfig[8];
+	uint8_t SataPortsHotPlug[8];

/* Enable/Disable SLP_S0 with GBE Support. 0: disable, 1: enable */
    uint8_t SlpS0WithGbeSupport;
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index bd2d7fc..3794ffd 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -297,6 +297,10 @@
    		sizeof(params->SataPortsEnable));
    	memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp,
    		sizeof(params->SataPortsDevSlp));
+
+		memcpy(params->SataPortsHotPlug, config->SataPortsHotPlug,
+			sizeof(params->SataPortsHotPlug));
+
 #if CONFIG(SOC_INTEL_COMETLAKE)
    	memcpy(params->SataPortsDevSlpResetConfig,
    		config->SataPortsDevSlpResetConfig,