Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41617 )
Change subject: mb/google/volteer/var/volteer: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/volteer: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by volteer and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x05 As per datasheet, this is a single die device. So, value should be 0x05. 19 0x00 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
Part: K4UBE3D4AA-MGCL Byte# Current New Explanation 6 0xB5 0x95 As per datasheet, this is a dual die device. So, value should be 0x95. 19 0x00 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet.
Part: H9HCNNNBKMMLXR-NEE Byte# Current New Explanation 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. tckMin is calculated as (1/4267)*2 which comes out to be 0.46871. Some datasheets round this down to 0.468 and others round it up to 0.469. JEDEC spec uses 0.468. As per that, this value comes out to be 0xE0.
Part: H9HCNNNFAMMLXR-NEE Byte# Current New Explanation 4 0x15 0x16 As per datasheet, density is 16Gb per logical channel. So value should be 0x16. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. tckMin is calculated as (1/4267)*2 which comes out to be 0.46871. Some datasheets round this down to 0.468 and others round it up to 0.469. JEDEC spec uses 0.468. As per that, this value comes out to be 0xE0.
Part: MT53E1G32D2NP-046 WT:A Byte# Current New Explanation 4 0x15 0x16 As per datasheet, density is 16Gb per logical channel. So value should be 0x16. 5 0x21 0x29 As per datasheet, this part has 17row address bits and 10column address bits. This results in 0x29. 6 0xB5 0x95 As per datasheet, this is a dual die device. So, value should be 0x95. 12 0x0A 0x02 As per datasheet, this is 1rank and 16-bit wide channel. So, value should be 0x02. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 29,30 0xC0,0x08 0xE0,0x0B As per datasheet, this corresponds to 380ns in MTB units which is 0x0BE0. 31,32 0x60,0x04 0xF0,0x05 As per datasheet, this corresponds to 190ns in MTB units which is 0x05F0. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0. BUG=b:147321551,b:155423877
Change-Id: I3998b2cd91020130bacf371fce9b0d307304acbe Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/volteer/memory/Makefile.inc A src/mainboard/google/volteer/variants/volteer/memory/mem_list_variant.txt 2 files changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/41617/1
diff --git a/src/mainboard/google/volteer/variants/volteer/memory/Makefile.inc b/src/mainboard/google/volteer/variants/volteer/memory/Makefile.inc new file mode 100644 index 0000000..5a06dd6 --- /dev/null +++ b/src/mainboard/google/volteer/variants/volteer/memory/Makefile.inc @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +SPD_SOURCES = +SPD_SOURCES += spd-3.hex # ID = 0(0b0000) Parts = K4U6E3S4AA-MGCL +SPD_SOURCES += spd-4.hex # ID = 1(0b0001) Parts = K4UBE3D4AA-MGCL +SPD_SOURCES += spd-1.hex # ID = 2(0b0010) Parts = H9HCNNNBKMMLXR-NEE +SPD_SOURCES += spd-2.hex # ID = 3(0b0011) Parts = H9HCNNNFAMMLXR-NEE +SPD_SOURCES += spd-5.hex # ID = 4(0b0100) Parts = MT53E1G32D2NP-046 WT:A diff --git a/src/mainboard/google/volteer/variants/volteer/memory/mem_list_variant.txt b/src/mainboard/google/volteer/variants/volteer/memory/mem_list_variant.txt new file mode 100644 index 0000000..fc84614 --- /dev/null +++ b/src/mainboard/google/volteer/variants/volteer/memory/mem_list_variant.txt @@ -0,0 +1,5 @@ +K4U6E3S4AA-MGCL +K4UBE3D4AA-MGCL +H9HCNNNBKMMLXR-NEE +H9HCNNNFAMMLXR-NEE +MT53E1G32D2NP-046 WT:A