Johannes Hahn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86424?usp=email )
Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ......................................................................
src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
Process the single SPD data file which resides in cbfs. Add KConfig switch for SPD data in cbfs and include Nanya_NT6AP512T32BV-J1I.spd.hex into the build by adding a correspondig Makefile.mk in the spd folder. Additional to load the memory confiugration FSP-M parameters for the romstage are set. Besides Kconfig switch USE_SIEMENS_HWILIB was removed. Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Signed-off-by: Johannes Hahn johannes-hahn@siemens.com --- M src/mainboard/siemens/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/romstage_fsp_params.c M src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c A src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/Makefile.mk A src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/spd.h 5 files changed, 26 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/86424/1
diff --git a/src/mainboard/siemens/fa_ehl/Kconfig b/src/mainboard/siemens/fa_ehl/Kconfig index d15bda1..7240e11 100644 --- a/src/mainboard/siemens/fa_ehl/Kconfig +++ b/src/mainboard/siemens/fa_ehl/Kconfig @@ -6,7 +6,7 @@ select BOARD_ROMSIZE_KB_16384 select DRIVERS_I2C_GENERIC select HAVE_ACPI_TABLES - select USE_SIEMENS_HWILIB + select HAVE_SPD_IN_CBFS select SOC_INTEL_DISABLE_POWER_LIMITS
config BOARD_SIEMENS_FA_EHL diff --git a/src/mainboard/siemens/fa_ehl/romstage_fsp_params.c b/src/mainboard/siemens/fa_ehl/romstage_fsp_params.c index 506bcc6..ed62414 100644 --- a/src/mainboard/siemens/fa_ehl/romstage_fsp_params.c +++ b/src/mainboard/siemens/fa_ehl/romstage_fsp_params.c @@ -1,10 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h> -#include <console/console.h> #include <device/dram/common.h> #include <device/mmio.h> -#include <hwilib.h> #include <soc/meminit.h> #include <soc/romstage.h> #include <string.h> @@ -14,24 +12,16 @@ { static struct spd_info spd_info; const struct mb_cfg *board_cfg = variant_memcfg_config(); - static uint8_t spd_data[CONFIG_DIMM_SPD_SIZE]; - const char *cbfs_hwi_name = "hwinfo.hex";
- /* Initialize SPD information for LPDDR4x from HW-Info primarily with a fallback to - spd.bin in the case where the SPD data in HW-Info is not available or invalid. */ - memset(spd_data, 0, sizeof(spd_data)); - if ((hwilib_find_blocks(cbfs_hwi_name) == CB_SUCCESS) && - (hwilib_get_field(SPD, spd_data, 0x80) == 0x80) && - (ddr_crc16(spd_data, 126) == read16((void *)&spd_data[126]))) { - spd_info.spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)spd_data; - spd_info.spd_spec.spd_data_ptr_info.spd_data_len = CONFIG_DIMM_SPD_SIZE; - spd_info.read_type = READ_SPD_MEMPTR; - } else { - die("SPD in HW-Info not valid!\n"); - } - /* Initialize variant specific configurations */ - memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, false); + bool half_populated = false; + spd_info.read_type = READ_SPD_CBFS; + spd_info.spd_spec.spd_index = 0x00; + + memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated);
/* Enable Row-Hammer prevention */ memupd->FspmConfig.RhPrevention = 1; + + /* Disable VT-d */ + memupd->FspmConfig.VtdDisable = 1; } diff --git a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c index 8088857..31d0a08 100644 --- a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c +++ b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h> -#include <gpio.h> #include <soc/meminit.h> #include <soc/romstage.h>
diff --git a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/Makefile.mk b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/Makefile.mk new file mode 100644 index 0000000..36f6226 --- /dev/null +++ b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only + +SPD_SOURCES = Nanya_NT6AP512T32BV-J1I.spd # 0b000 \ No newline at end of file diff --git a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/spd.h b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/spd.h new file mode 100644 index 0000000..e2fe0f3 --- /dev/null +++ b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/spd.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef MAINBOARD_SPD_H +#define MAINBOARD_SPD_H + +#include <stdint.h> + +void mainboard_fill_dq_map_ch0(u8 *dq_map_ptr); +void mainboard_fill_dq_map_ch1(u8 *dq_map_ptr); +void mainboard_fill_dqs_map_ch0(u8 *dqs_map_ptr); +void mainboard_fill_dqs_map_ch1(u8 *dqs_map_ptr); +void mainboard_fill_rcomp_res_data(u16 *rcomp_ptr); +void mainboard_fill_rcomp_strength_data(u16 *rcomp_strength_ptr); +#endif