[coreboot-gerrit] [S] Change in coreboot[master]: src/soc/intel/mtl: Add Intel RMT+ support

[Gaggery Tsai (Code Review)]

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun Tuli.

Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77257?usp=email )

Change subject: src/soc/intel/mtl: Add Intel RMT+ support
......................................................................

src/soc/intel/mtl: Add Intel RMT+ support

This patch adds Intel RMT+ support. It enables the RMT and enforce
SaGv enabling with BDAT support. The RMT type is per bit rank margin
data.

BUG=b:293441360
TEST=1. Build an image with SOC_INTEL_RMT_PLUS enabled
     2. Deploy the image to Rex device
     3. Ensure /sys/firmware/acpi/tables/BDAT is exported from kernel.

Change-Id: Ieeaa8faf059bed90fca5029d4274db431b4eebea
Signed-off-by: Gaggery Tsai 
---
M src/soc/intel/meteorlake/Kconfig
M src/soc/intel/meteorlake/romstage/fsp_params.c
2 files changed, 18 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/77257/1

diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 6391ed8..b73d046 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -137,6 +137,13 @@
    select COS_MAPPED_TO_MSB
    select CAR_HAS_L3_PROTECTED_WAYS

+config SOC_INTEL_RMT_PLUS
+	bool
+	default n
+	select SOC_INTEL_COMMON_ACPI_BDAT
+	help
+	  Intel RMT plus feature
+
 config MAX_CPUS
    int
    default 22
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index fd634ec..2e4a851 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -157,6 +157,17 @@
    m_cfg->RMT = config->rmt;
    /* Enable MRC Fast Boot */
    m_cfg->MrcFastBoot = 1;
+#if CONFIG(SOC_INTEL_RMT_PLUS)
+	printk(BIOS_INFO, "RMT Plus is enabled.\n");
+	/* Enable SaGv */
+	m_cfg->SaGv = 1;
+	/* Enable RMT */
+	m_cfg->RMT = 1;
+	/* Eanble BDAT support */
+	m_cfg->BdatEnable = 1;
+	/* Per Bit Rank Margin Data */
+	m_cfg->BdatTestType = 1;
+#endif
 }

static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg,