Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30893 )
Change subject: Drop leftover debug function declarations ......................................................................
Drop leftover debug function declarations
Change-Id: Ib93b816e7ab3146f6f70ad4089327cd6b7bc7c24 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/30893 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: David Guckian Reviewed-by: Vanny E vanessa.f.eusebio@intel.com Reviewed-by: Nico Huber nico.h@gmx.de --- M src/northbridge/intel/fsp_rangeley/northbridge.h M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/nehalem/nehalem.h M src/northbridge/intel/sandybridge/sandybridge.h M src/soc/intel/denverton_ns/include/soc/bootblock.h M src/soc/intel/fsp_baytrail/include/soc/baytrail.h 6 files changed, 0 insertions(+), 37 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved HAOUAS Elyes: Looks good to me, but someone else must approve Vanny E: Looks good to me, but someone else must approve David Guckian: Looks good to me, but someone else must approve
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h index e384683..160d754 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.h +++ b/src/northbridge/intel/fsp_rangeley/northbridge.h @@ -63,13 +63,6 @@ u32 sideband_read(int port, int reg); void sideband_write(int port, int reg, long data);
-/* debugging functions */ -void print_pci_devices(void); -void dump_pci_device(unsigned dev); -void dump_pci_devices(void); -void dump_spd_registers(void); -void report_platform_info(void); - #ifndef __SIMPLE_DEVICE__ void northbridge_acpi_fill_ssdt_generator(struct device *device); #endif diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index 9125764..22b9437 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -223,11 +223,6 @@ void set_translation_table(int start, int end, u64 base, int inc); void haswell_unhide_peg(void);
-/* debugging functions */ -void print_pci_devices(void); -void dump_pci_device(unsigned dev); -void dump_pci_devices(void); -void dump_spd_registers(void); void report_platform_info(void); #endif /* !__SMM__ */
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h index b0e8490..1f686d5 100644 --- a/src/northbridge/intel/nehalem/nehalem.h +++ b/src/northbridge/intel/nehalem/nehalem.h @@ -272,12 +272,6 @@ void nehalem_early_initialization(int chipset_type); void nehalem_late_initialization(void);
-/* debugging functions */ -void print_pci_devices(void); -void dump_pci_device(unsigned dev); -void dump_pci_devices(void); -void dump_spd_registers(void); -void report_platform_info(void); #endif /* !__SMM__ */
#endif diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 8e6be29..b29dc6a 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -213,12 +213,6 @@ void sandybridge_late_initialization(void); void northbridge_romstage_finalize(int s3resume);
-/* debugging functions */ -void print_pci_devices(void); -void dump_pci_device(unsigned dev); -void dump_pci_devices(void); -void dump_spd_registers(void); - #endif /* !__SMM__ */
void pch_enable_lpc(void); diff --git a/src/soc/intel/denverton_ns/include/soc/bootblock.h b/src/soc/intel/denverton_ns/include/soc/bootblock.h index 5136ecd..6efedc3 100644 --- a/src/soc/intel/denverton_ns/include/soc/bootblock.h +++ b/src/soc/intel/denverton_ns/include/soc/bootblock.h @@ -22,12 +22,4 @@ //void bootblock_systemagent_early_init(void); void early_uart_init(void);
-/* Bootblock post console init programming */ -//void enable_smbus(void); -//void i2c_early_init(void); -//void pch_early_init(void); -//void report_platform_info(void); -//void report_memory_config(void); -//void set_max_freq(void); - #endif diff --git a/src/soc/intel/fsp_baytrail/include/soc/baytrail.h b/src/soc/intel/fsp_baytrail/include/soc/baytrail.h index 68bdd12..34831b1 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/baytrail.h +++ b/src/soc/intel/fsp_baytrail/include/soc/baytrail.h @@ -58,11 +58,6 @@ int soc_silicon_supported(int type, int rev); void soc_enable(struct device *dev);
-/* debugging functions */ -void print_pci_devices(void); -void dump_pci_device(unsigned dev); -void dump_pci_devices(void); -void dump_spd_registers(void); void report_platform_info(void);
#endif /* __PRE_RAM__ */