[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )

Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake
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Patch Set 5:
> Patch Set 5:
>
> Hi All,
>
> Subrata is correct that this change is for FSP 2.1. The FSP 2.1 spec is available publicly via intel.com:
>
> https://cdrdv2.intel.com/v1/dl/getContent/611786
>
> Please refer to section 6.1.2, page 25:
>
> For FSP implementations compliant to v2.0 of this
> specification, the temporary RAM is used to establish
> a stack and a HOB heap. For FSP implementations
> compliant to v2.1 of this specification, the temporary
> RAM is only used for a HOB heap.
>
> Starting with v2.1 of this specification, FSP will run on
> top of the stack provided by the bootloader instead of
> establishing a separate stack. This allows the stack
> memory to be reused after FspMemoryInit() returns
> to the bootloader. To retain backwards compatibility
> with earlier versions of this specification, this
> parameter retains the StackBase name
>
> However, I believe this feature was moved in to the CoffeeLake FSP even though it technically only implements FSP spec v2.0. Accordingly, I agree that this should be mentioned in the CoffeeLake FSP integration guide if it is not already.

Please also publish the integration guide, as the external specification guide doesn't specify the exact HOB heap size requirements.