[coreboot-gerrit] Change in coreboot[master]: soc/amd/{picasso,common/blocks/pci}: Move populate_pirq_data

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52913 )

Change subject: soc/amd/{picasso,common/blocks/pci}: Move populate_pirq_data
......................................................................

soc/amd/{picasso,common/blocks/pci}: Move populate_pirq_data

The method now dynamically allocates the pirq structure and uses the
get_pci_routing_table method.

BUG=b:184766519
TEST=Build guybrush and verify picasso SSDT has not changed.

Signed-off-by: Raul E Rangel 
Change-Id: I297fc3ca7227fb4794ac70bd046ce2f93da8b869
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52913
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/soc/amd/common/block/include/amdblocks/amd_pci_util.h
M src/soc/amd/common/block/pci/pci_routing_info.c
M src/soc/amd/picasso/pcie_gpp.c
3 files changed, 35 insertions(+), 30 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/soc/amd/common/block/include/amdblocks/amd_pci_util.h b/src/soc/amd/common/block/include/amdblocks/amd_pci_util.h
index b9cd140..83922c9 100644
--- a/src/soc/amd/common/block/include/amdblocks/amd_pci_util.h
+++ b/src/soc/amd/common/block/include/amdblocks/amd_pci_util.h
@@ -51,7 +51,6 @@
    uint8_t irq;
 } __packed;

-/* Implemented by the SoC */
 void populate_pirq_data(void);

/* Implemented by the SoC */
diff --git a/src/soc/amd/common/block/pci/pci_routing_info.c b/src/soc/amd/common/block/pci/pci_routing_info.c
index e0a6964..ac72553 100644
--- a/src/soc/amd/common/block/pci/pci_routing_info.c
+++ b/src/soc/amd/common/block/pci/pci_routing_info.c
@@ -3,6 +3,7 @@
 #include <amdblocks/amd_pci_util.h>
 #include <console/console.h>
 #include <device/pci_def.h>
+#include <stdlib.h>
 #include <types.h>

enum pcie_swizzle_pin {
@@ -55,3 +56,37 @@

return irq;
 }
+
+void populate_pirq_data(void)
+{
+	const struct pci_routing_info *routing_table, *routing_entry;
+	size_t entries = 0;
+	struct pirq_struct *pirq;
+	unsigned int irq;
+
+	routing_table = get_pci_routing_table(&entries);
+
+	if (!routing_table || !entries)
+		return;
+
+	pirq = calloc(entries, sizeof(*pirq));
+
+	if (!pirq) {
+		printk(BIOS_ERR, "%s: Allocation failed\n", __func__);
+		return;
+	}
+
+	for (size_t i = 0; i < entries; ++i) {
+		routing_entry = &routing_table[i];
+
+		pirq[i].devfn = routing_entry->devfn;
+		for (size_t j = 0; j < 4; ++j) {
+			irq = pci_calculate_irq(routing_entry, j);
+
+			pirq[i].PIN[j] = irq % 8;
+		}
+	}
+
+	pirq_data_ptr = pirq;
+	pirq_data_size = entries;
+}
diff --git a/src/soc/amd/picasso/pcie_gpp.c b/src/soc/amd/picasso/pcie_gpp.c
index f609875..15174f6 100644
--- a/src/soc/amd/picasso/pcie_gpp.c
+++ b/src/soc/amd/picasso/pcie_gpp.c
@@ -31,35 +31,6 @@
    return pci_routing_table;
 }

-/*
- * This data structure is populated from the raw data above. It is used
- * by amd/common/block/pci/amd_pci_util to write the PCI_INT_LINE register
- * to each PCI device.
- */
-static struct pirq_struct pirq_data[ARRAY_SIZE(pci_routing_table)];
-
-void populate_pirq_data(void)
-{
-	const struct pci_routing_info *pci_routing;
-	struct pirq_struct *pirq;
-	unsigned int irq_index;
-
-	for (size_t i = 0; i < ARRAY_SIZE(pirq_data); ++i) {
-		pirq = &pirq_data[i];
-		pci_routing = &pci_routing_table[i];
-
-		pirq->devfn = pci_routing->devfn;
-		for (size_t j = 0; j < 4; ++j) {
-			irq_index = pci_calculate_irq(pci_routing, j);
-
-			pirq->PIN[j] = irq_index % 8;
-		}
-	}
-
-	pirq_data_ptr = pirq_data;
-	pirq_data_size = ARRAY_SIZE(pirq_data);
-}
-
 static const char *pcie_gpp_acpi_name(const struct device *dev)
 {
    if (dev->path.type != DEVICE_PATH_PCI)