Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78176?usp=email )
Change subject: soc/amd/common/noncar/cpu: simplify get_reserved_phys_addr_bits ......................................................................
soc/amd/common/noncar/cpu: simplify get_reserved_phys_addr_bits
Simplify the code a bit by returning 0 early in the function when the SYSCFG_MSR_SMEE bit isn't set.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Suggested-by: Jeremy Compostella jeremy.compostella@intel.com Change-Id: I7536b82d98e55c51105448090d1206e1ed7f62d8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78176 Reviewed-by: Jérémy Compostella jeremy.compostella@intel.com Reviewed-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/common/block/cpu/noncar/cpu.c 1 file changed, 4 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Jérémy Compostella: Looks good to me, but someone else must approve Matt DeVillier: Looks good to me, approved
diff --git a/src/soc/amd/common/block/cpu/noncar/cpu.c b/src/soc/amd/common/block/cpu/noncar/cpu.c index eefd62f..136cb42 100644 --- a/src/soc/amd/common/block/cpu/noncar/cpu.c +++ b/src/soc/amd/common/block/cpu/noncar/cpu.c @@ -38,10 +38,9 @@ /* Number of most significant physical address bits reserved for secure memory encryption */ unsigned int get_reserved_phys_addr_bits(void) { - if (rdmsr(SYSCFG_MSR).raw & SYSCFG_MSR_SMEE) - return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) & - CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_MASK) >> - CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_SHIFT; - else + if (!(rdmsr(SYSCFG_MSR).raw & SYSCFG_MSR_SMEE)) return 0; + + return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) & CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_MASK) >> + CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_SHIFT; }