[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/icelake: Add option to enable display over PCI external GFX

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33739

Change subject: soc/intel/icelake: Add option to enable display over PCI external GFX
......................................................................

soc/intel/icelake: Add option to enable display over PCI external GFX

This patch selects FSP UPDs required for internal and external GFX bring
up based on CONFIG_ENABLE_EXT_GFX Kconfig.

Change-Id: I34a02bff112f922cabd48c23bc76370892ec62d9
Signed-off-by: Subrata Banik 
---
M src/soc/intel/icelake/fsp_params.c
M src/soc/intel/icelake/romstage/fsp_params.c
2 files changed, 38 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/33739/1

diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c
index ac7edd2..2792d26 100644
--- a/src/soc/intel/icelake/fsp_params.c
+++ b/src/soc/intel/icelake/fsp_params.c
@@ -80,9 +80,24 @@

mainboard_silicon_init_params(params);

-	params->PeiGraphicsPeimInit = 1;
-	params->GtFreqMax = 2;
-	params->CdClock = 3;
+	dev = pcidev_on_root(2, 0);
+
+	if (!dev || !dev->enabled) {
+		/*
+		 * If iGPU is disabled or not defined in the devicetree.cb,
+		 * the FSP does not initialize this device
+		 */
+		params->PeiGraphicsPeimInit = 0;
+		if (CONFIG(ENABLE_EXT_GFX)) {
+			params->Enable8254ClockGating = 0;
+			params->Enable8254ClockGatingOnS3 = 0;
+		}
+	} else {
+		params->PeiGraphicsPeimInit = 1;
+		params->GtFreqMax = 2;
+		params->CdClock = 3;
+	}
+
    /* Unlock upper 8 bytes of RTC RAM */
    params->PchLockDownRtcMemoryLock = 0;

diff --git a/src/soc/intel/icelake/romstage/fsp_params.c b/src/soc/intel/icelake/romstage/fsp_params.c
index 3c49fee..415c039 100644
--- a/src/soc/intel/icelake/romstage/fsp_params.c
+++ b/src/soc/intel/icelake/romstage/fsp_params.c
@@ -25,17 +25,34 @@
    	const struct soc_intel_icelake_config *config)
 {
    unsigned int i;
-	const struct device *dev = pcidev_on_root(0, 0);
+	const struct device *dev = pcidev_on_root(2, 0);
    uint32_t mask = 0;

-	/* Set IGD stolen size to 60MB. */
-	m_cfg->IgdDvmt50PreAlloc = 0xFE;
+	if (!dev || !dev->enabled) {
+		/*
+		 * If iGPU is disabled or not defined in the devicetree.cb,
+		 * the FSP does not initialize this device
+		 */
+		m_cfg->InternalGfx = 0;
+		m_cfg->IgdDvmt50PreAlloc = 0;
+		if (CONFIG(ENABLE_EXT_GFX)) {
+			m_cfg->ScanExtGfxForLegacyOpRom = 1;
+			m_cfg->PrimaryDisplay = 2;
+		}
+	} else {
+		m_cfg->InternalGfx = 1;
+		/* Set IGD stolen size to 60MB. */
+		m_cfg->IgdDvmt50PreAlloc = 0xFE;
+	}
+
    m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
    m_cfg->IedSize = CONFIG_IED_REGION_SIZE;
    m_cfg->SaGv = config->SaGv;
    m_cfg->UserBd = BOARD_TYPE_ULT_ULX;
    m_cfg->RMT = config->RMT;
    m_cfg->SkipMbpHob = 1;
+
+	dev = pcidev_on_root(0x1f, 3);
    /* If Audio Codec is enabled, enable FSP UPD */
    if (!dev)
    	m_cfg->PchHdaEnable = 0;