[coreboot-gerrit] Change in coreboot[master]: cpu/x86/smm: Define APM_CNT_ROUTE_ALL_XHCI

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42619 )

Change subject: cpu/x86/smm: Define APM_CNT_ROUTE_ALL_XHCI
......................................................................

cpu/x86/smm: Define APM_CNT_ROUTE_ALL_XHCI

Change-Id: I0bc321f499278e0cdbfb40be9a2b2ae21828d2f4
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42619
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/include/cpu/x86/smm.h
M src/southbridge/intel/lynxpoint/smihandler.c
M src/southbridge/intel/lynxpoint/usb_xhci.c
3 files changed, 4 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 513b6df..9db1461 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -24,6 +24,7 @@
 #define APM_CNT_ACPI_ENABLE	0xe1
 #define APM_CNT_MBI_UPDATE	0xeb
 #define APM_CNT_GNVS_UPDATE	0xea
+#define APM_CNT_ROUTE_ALL_XHCI	0xca
 #define APM_CNT_FINALIZE	0xcb
 #define APM_CNT_LEGACY		0xcc
 #define APM_CNT_SMMINFO		0xec
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index 8bbe3fe..be842c5 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -330,7 +330,7 @@
    		printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs);
    	}
    	break;
-	case 0xca:
+	case APM_CNT_ROUTE_ALL_XHCI:
    	usb_xhci_route_all();
    	break;
    case APM_CNT_ELOG_GSMI:
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index 8684aa9..1cfec1b 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <cpu/x86/smm.h>
 #include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <arch/io.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include "chip.h"
@@ -356,7 +356,7 @@
    	usb_xhci_reset_usb3(dev, 0);
    } else if (config->xhci_default) {
    	/* Route all ports to XHCI */
-		outb(0xca, 0xb2);
+		apm_control(APM_CNT_ROUTE_ALL_XHCI);
    }
 }