Hello Kyösti Mälkki, Aaron Durbin, Patrick Rudolph, Nathaniel L Desimone, Aamir Bohra, Kane Chen, build bot (Jenkins), Furquan Shaikh, Meera Ravindranath, Usha P, Tim Wawrzynczak, V Sowmya,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35165
to look at the new patch set (#2).
Change subject: cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable ......................................................................
cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable
With FSP2.1 FSP_USES_CB_STACK likely to be enable. Impacted platforms are CML (FSP2.0 + FSP_USES_CB_STACK feature enable) and ICL.
Don't need to run code logic to check the integrity of stack if FSP and coreboot both likely to make use of common stack. Notified by CONFIG_FSP_USES_CB_STACK, its expected to print "Smashed stack detected in romstage!" msg multiple time in that case.
This patch fixes CML/ICL platform printing "Smashed stack detected in romstage!" multiple times. This prints might be misleading.
TEST=Build and boot CML-Hatch
With this CL
No "Smashed stack detected in romstage!" msg in serial log.
Without this CL
"Smashed stack detected in romstage!" 64 times in serial log after FSP-M returns into coreboot.
Change-Id: I943eff1225b976dc4440a6ca6d02ceea378319f8 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/cpu/intel/car/romstage.c 1 file changed, 13 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/35165/2