Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31026
Change subject: [WIP] AGESA/binaryPI: Add NULL pointers check ......................................................................
[WIP] AGESA/binaryPI: Add NULL pointers check
Previously used call dev_find_slot() returned pointers to PCI device nodes that were actually not present in the hardware at all. Register reads would come back with invalid (0xff) values and writes ignored.
After change to pcidev_on_root(), attempting to do register operations with non-present PCI hardware immediately halts with error get_pbus: dev is NULL!
Change-Id: I785350c171a642207c5fab884a953d45a3bfe592 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/northbridge/amd/pi/00730F01/northbridge.c 1 file changed, 9 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/31026/1
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 2579d37..4066d12 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -787,14 +787,18 @@ struct device *dev; u32 value; dev = pcidev_on_root(0, 0); /* clear IoapicSbFeatureEn */ - pci_write_config32(dev, 0xF8, 0); - pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */ + if (dev != NULL) { + pci_write_config32(dev, 0xF8, 0); + pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */ + }
/* disable No Snoop */ dev = pcidev_on_root(1, 1); - value = pci_read_config32(dev, 0x60); - value &= ~(1 << 11); - pci_write_config32(dev, 0x60, value); + if (dev != NULL) { + value = pci_read_config32(dev, 0x60); + value &= ~(1 << 11); + pci_write_config32(dev, 0x60, value); + } }
struct chip_operations northbridge_amd_pi_00730F01_ops = {