Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/22964
Change subject: mb/google/fizz: revise LED0 behavior for link speed 100Mb ......................................................................
mb/google/fizz: revise LED0 behavior for link speed 100Mb
This patch revises LED0 Green light behavior from patch 2ecf3f8c. For 100Mb link speed, LED0 should be OFF.
BUG=b:65437780, b:68284778, b:69950854 BRANCH=None TEST=Run DUT with 100Mb and 1000Mb ethernet connection and observe LED0 is behaving as expected.
Change-Id: Ia805c955711b8ce77eba087a28427a005c456fa1 Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com --- M src/mainboard/google/fizz/devicetree.cb 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/22964/1
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb index 18031d6..8adc4ce 100644 --- a/src/mainboard/google/fizz/devicetree.cb +++ b/src/mainboard/google/fizz/devicetree.cb @@ -291,7 +291,7 @@ device pci 19.2 off end # I2C #4 device pci 1c.0 on # PCI Express Port 1 chip drivers/net - register "customized_leds" = "0x0fa7" + register "customized_leds" = "0x0fa5" register "wake" = "GPE0_PCI_EXP" device pci 00.0 on end end @@ -311,7 +311,7 @@ device pci 1c.7 off end # PCI Express Port 8 device pci 1d.0 on # PCI Express Port 9 for 2nd LAN chip drivers/net - register "customized_leds" = "0x0fa7" + register "customized_leds" = "0x0fa5" device pci 00.0 on end end end # PCI Express Port 9 for BtoB