[coreboot-gerrit] Change in coreboot[master]: mrc_cache: Update mrc_cache data in romstage

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44196 )

Change subject: mrc_cache: Update mrc_cache data in romstage
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Patch Set 29:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44196/29/src/drivers/mrc_cache/Kcon... 
File src/drivers/mrc_cache/Kconfig:

https://review.coreboot.org/c/coreboot/+/44196/29/src/drivers/mrc_cache/Kcon... 
PS29, Line 29: MRC_WRITE_NV_LATE
> Does this option make sense to anyone? I find boot-state hooks already pretty […]

There is only one platform that is actually using this - Stoneyridge. And the change that added the Kconfig only says that the current boot state is too early: https://review.coreboot.org/c/coreboot/+/22937. From the comments on that and related CLs, it looks like probably the data is not really available by then. But, I don't really know if there are other issues as well.

As for other platforms - Intel, this needs to be done before the PRR lockdown happens. So, that is the reason for not moving Intel platforms to do these later.