[coreboot-gerrit] Change in ...coreboot[master]: mb/google/poppy/variants/atlas: Update DPTF parameters

[Puthikorn Voravootivat (Code Review)]

Puthikorn Voravootivat has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31628

Change subject: mb/google/poppy/variants/atlas: Update DPTF parameters
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mb/google/poppy/variants/atlas: Update DPTF parameters

Preliminary dptf change for Atlas
- Throttle charger using all temp sensors (not just ambient)
- Throttle charger with higher priority than CPU
- Update throttle temperature using data from surface thermistor
  in thermal chamber test

BUG=b:113101335
BRANCH=None
TEST=based on preliminary data from thermal chamber test

Change-Id: Ic1ab72f569e8a4f7bffc5560518fb703d32f4b21
Signed-off-by: Puthikorn Voravootivat 
---
M 3rdparty/blobs
M src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
2 files changed, 18 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/31628/1

diff --git a/3rdparty/blobs b/3rdparty/blobs
index 16058e5..678b4c4 160000
--- a/3rdparty/blobs
+++ b/3rdparty/blobs
@@ -1 +1 @@
-Subproject commit 16058e552279b4884b1f671e7a78752d28abd1cc
+Subproject commit 678b4c4a81069bb6e10e2e59f5374b83d727cd2b
diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
index 85eb891..44aed8b 100644
--- a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl
@@ -24,17 +24,17 @@

#define DPTF_TSR1_SENSOR_ID		2
 #define DPTF_TSR1_SENSOR_NAME		"Charger"
-#define DPTF_TSR1_PASSIVE		48
+#define DPTF_TSR1_PASSIVE		53
 #define DPTF_TSR1_CRITICAL		90

#define DPTF_TSR2_SENSOR_ID		3
 #define DPTF_TSR2_SENSOR_NAME		"DRAM"
-#define DPTF_TSR2_PASSIVE		65
+#define DPTF_TSR2_PASSIVE		54
 #define DPTF_TSR2_CRITICAL		75

#define DPTF_TSR3_SENSOR_ID		4
 #define DPTF_TSR3_SENSOR_NAME		"eMMC"
-#define DPTF_TSR3_PASSIVE		65
+#define DPTF_TSR3_PASSIVE		54
 #define DPTF_TSR3_CRITICAL		75

#undef DPTF_ENABLE_FAN_CONTROL
@@ -52,20 +52,26 @@
    /* CPU Throttle Effect on CPU */
    Package () { _SB.PCI0.B0D4, _SB.PCI0.B0D4, 100, 10, 0, 0, 0, 0 },

-	/* CPU Throttle Effect on TSR0 */
+	/* CPU Throttle Effect on Ambient */
    Package () { _SB.PCI0.B0D4, _SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },

-	/* CPU Throttle Effect on TSR1 */
-	Package () { _SB.PCI0.B0D4, _SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
-
-	/* CPU Throttle Effect on TSR2 */
+	/* CPU Throttle Effect on DRAM */
    Package () { _SB.PCI0.B0D4, _SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },

-	/* CPU Throttle Effect on TSR3 */
+	/* CPU Throttle Effect on eMMC */
    Package () { _SB.PCI0.B0D4, _SB.DPTF.TSR3, 100, 600, 0, 0, 0, 0 },

-	/* Charger Throttle Effect on TSR0 */
-	Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
+	/* Charger Throttle Effect on Ambient */
+	Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR0, 200, 50, 0, 0, 0, 0 },
+
+	/* Charger Throttle Effect on Charger */
+	Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR1, 200, 50, 0, 0, 0, 0 },
+
+	/* Charger Throttle Effect on DRAM */
+	Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR2, 200, 50, 0, 0, 0, 0 },
+
+	/* Charger Throttle Effect on eMMC */
+	Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR3, 200, 50, 0, 0, 0, 0 },
 })

Name (MPPC, Package ()