[coreboot-gerrit] [S] Change in coreboot[master]: drivers/intel/fsp2_0/memory_init.c: clean code

[Maximilian Brune (Code Review)]

Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68592 )

Change subject: drivers/intel/fsp2_0/memory_init.c: clean code
......................................................................

drivers/intel/fsp2_0/memory_init.c: clean code

Change-Id: I4d57c45ede520160ef615725c023b7e92289a995
---
M src/drivers/intel/fsp2_0/memory_init.c
1 file changed, 12 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/68592/1

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index f7aaed4..99b0fea 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -26,14 +26,11 @@

static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));

-static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
+static void save_memory_training_data(uint32_t fsp_version)
 {
    size_t  mrc_data_size;
    const void *mrc_data;

-	if (!CONFIG(CACHE_MRC_SETTINGS) || s3wake)
-		return;
-
    mrc_data = fsp_find_nv_storage_data(&mrc_data_size);
    if (!mrc_data) {
    	printk(BIOS_ERR, "FSP_NON_VOLATILE_STORAGE_HOB missing!\n");
@@ -76,7 +73,8 @@
    	(uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY))
    	die("Failed to accommodate FSP reserved memory request!\n");

-	save_memory_training_data(s3wake, fsp_version);
+	if (CONFIG(CACHE_MRC_SETTINGS) && !s3wake)
+		save_memory_training_data(fsp_version);

/* Create romstage handof information */
    romstage_handoff_init(s3wake);