Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46838 )
Change subject: [TEST] Revert "mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature" ......................................................................
[TEST] Revert "mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature"
This reverts commit b5e4e3441841d8d1b7fac1240b7c73d288df66d5 Due to TSR1 passive threshold set to 51C which seems very low. This is impacting the performance on the system as per this reported bug.
BUG=b:170229672 BRANCH=None TEST=Built and tested on dedede system
Change-Id: Ie87bb0a4b6c71f21ac7a83029be2bb6d83e62793 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/46838/1
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index 5942121..0c69d4b 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -92,7 +92,7 @@ register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 80, 1000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000), - [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 51, 1000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000), [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000) }"