Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44704 )
Change subject: soc/mediatek/mt8192: Do dramc software impedance calibration ......................................................................
Patch Set 45:
(6 comments)
https://review.coreboot.org/c/coreboot/+/44704/2/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44704/2/src/soc/mediatek/mt8192/dra... PS2, Line 9:
Extra indent
Ack
https://review.coreboot.org/c/coreboot/+/44704/2/src/soc/mediatek/mt8192/dra... PS2, Line 16: u8 vref_tmp = 0; : vref_tmp = imp_vref_sel[odt][drv_type];
Can be combined into one line.
Ack
https://review.coreboot.org/c/coreboot/+/44704/45/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44704/45/src/soc/mediatek/mt8192/dr... PS45, Line 7: Extra indent
https://review.coreboot.org/c/coreboot/+/44704/45/src/soc/mediatek/mt8192/dr... PS45, Line 14: u8 vref_tmp = 0; : vref_tmp = imp_vref_sel[odt][drv_type]; Can be combined into one line.
https://review.coreboot.org/c/coreboot/+/44704/45/src/soc/mediatek/mt8192/dr... PS45, Line 66: OK Either "done" or "passed"
https://review.coreboot.org/c/coreboot/+/44704/45/src/soc/mediatek/mt8192/dr... PS45, Line 73: FAIL failed