build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26603 )
Change subject: src/northbridge: Remove whitespace before tab ......................................................................
Patch Set 10:
(10 comments)
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/agesa/family14/... File src/northbridge/amd/agesa/family14/chip.h:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/agesa/family14/... PS10, Line 30: * { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 (Unused) line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdht/h3gtopo.h File src/northbridge/amd/amdht/h3gtopo.h:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdht/h3gtopo.h... PS10, Line 259: 0x00, 0x44, 0x00, 0x44, 0x00, 0x44, 0x00, 0x44, 0x00, 0x44, 0x00, 0x44, 0x10, 0xFF // Node6 line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/amddefs.... File src/northbridge/amd/amdmct/amddefs.h:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/amddefs.... PS10, Line 77: #define AMD_DA_Cx (AMD_DA_C2 | AMD_DA_C3) please, no space before tabs
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct/mct_... File src/northbridge/amd/amdmct/mct/mct_d.c:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct/mct_... PS10, Line 3756: * b) Reset the Begin Compensation bit (D3CMP->COMP_CONFIG[0]) in all the compensation engines line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct/mctd... File src/northbridge/amd/amdmct/mct/mctdqs_d.c:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct/mctd... PS10, Line 464: BanksPresent = 1; /* flag for at least one bank is present */ line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct_ddr3... File src/northbridge/amd/amdmct/mct_ddr3/mct_d.c:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct_ddr3... PS10, Line 7912: * b) Reset the Begin Compensation bit (D3CMP->COMP_CONFIG[0]) in all the compensation engines line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct_ddr3... File src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct_ddr3... PS10, Line 118: OB_ChipKill = mctGet_NVbits(NV_ChipKill); /* ECC Chip-kill mode */ line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct_ddr3... PS10, Line 123: /* mct_AdjustScrub_D(pDCTstatA, &nvbits); */ /* Need not adjust */ line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct_ddr3... File src/northbridge/amd/amdmct/mct_ddr3/s3utils.c:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/amdmct/mct_ddr3... PS10, Line 699: // wrmsr_uint64_t(0x00000260 | (i + 8), data->msr0000026[i]); line over 80 characters
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/lx/northbridgei... File src/northbridge/amd/lx/northbridgeinit.c:
https://review.coreboot.org/#/c/26603/10/src/northbridge/amd/lx/northbridgei... PS10, Line 597: * SYSRC(7:0) = 00h ; writeback, can set to 08h to make writethrough line over 80 characters