[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/alderlake: Hook up P2SB PCI ops

[Michał Żygowski (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik.

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69949 )

Change subject: soc/intel/alderlake: Hook up P2SB PCI ops
......................................................................

soc/intel/alderlake: Hook up P2SB PCI ops

P2SB device is being hidden from coreboot by FSP-S. This breaks the
resouce allocator which does not report P2SB BAR via intel common
block P2SB driver. Hook up the common block P2SB driver ops to
soc_enable function so that the resources will be reported. The P2SB
device must be set as hidden in the devicetree.

This fixes the silent resource allocation conflicts on machines with
devices having big BARs which accidentally overlapped P2SB BAR.

TEST=Boot MSI PRO Z690-A with multiple PCIe devices/dGPUs with big
BARs and see resource conflicts no longer occur.

Signed-off-by: Michał Żygowski 
Change-Id: I7c59441268676a8aab075abbc036e651b9426057
---
M src/soc/intel/alderlake/chip.c
M src/soc/intel/alderlake/include/soc/p2sb.h
2 files changed, 29 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/69949/1

diff --git a/src/soc/intel/alderlake/chip.c b/src/soc/intel/alderlake/chip.c
index f84d2cb..98e2ea0 100644
--- a/src/soc/intel/alderlake/chip.c
+++ b/src/soc/intel/alderlake/chip.c
@@ -15,6 +15,7 @@
 #include <soc/hsphy.h>
 #include <soc/intel/common/vbt.h>
 #include <soc/itss.h>
+#include <soc/p2sb.h>
 #include <soc/pci_devs.h>
 #include <soc/pcie.h>
 #include <soc/ramstage.h>
@@ -232,6 +233,7 @@

static void soc_enable(struct device *dev)
 {
+	struct device_operations *soc_p2sb_ops = (struct device_operations *)&p2sb_ops;
    /*
     * Set the operations if it is a special bus type or a hidden PCI
     * device.
@@ -243,6 +245,9 @@
    else if (dev->path.type == DEVICE_PATH_PCI &&
    	 dev->path.pci.devfn == PCH_DEVFN_PMC)
    	dev->ops = &pmc_ops;
+	else if (dev->path.type == DEVICE_PATH_PCI &&
+		 dev->path.pci.devfn == PCH_DEVFN_P2SB)
+		dev->ops = soc_p2sb_ops;
    else if (dev->path.type == DEVICE_PATH_GPIO)
    	block_gpio_enable(dev);
 }
diff --git a/src/soc/intel/alderlake/include/soc/p2sb.h b/src/soc/intel/alderlake/include/soc/p2sb.h
index 2726851..367ace2 100644
--- a/src/soc/intel/alderlake/include/soc/p2sb.h
+++ b/src/soc/intel/alderlake/include/soc/p2sb.h
@@ -14,4 +14,6 @@

#define PCH_P2SB_EPMASK0		0x220

+extern const struct device_operations p2sb_ops;
+
 #endif