[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Drop always-zero PowerLimit4 dt setting

[Benjamin Doron (Code Review)]

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48575 )

Change subject: soc/intel/skylake: Drop always-zero PowerLimit4 dt setting
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Patch Set 2:

(1 comment)

core

https://review.coreboot.org/c/coreboot/+/48575/2/src/soc/intel/skylake/chip.... 
File src/soc/intel/skylake/chip.c:

https://review.coreboot.org/c/coreboot/+/48575/2/src/soc/intel/skylake/chip.... 
PS2, Line 306: tconfig->PowerLimit4 = 0
coreboot configures PL4 in `soc/intel/common/block/power_limit/power_limit.c`. FSP does not "lock" this (`PowerLimit4Lock = 0`), so can this be dropped entirely?