Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86588?usp=email )
Change subject: soc/riscv/ucb: Switch to FDT parsing to get memory size ......................................................................
soc/riscv/ucb: Switch to FDT parsing to get memory size
Currently, coreboot tries to manually probe the memory for the Spike target as part of the SOC_UCB_RISCV target.
However, Spike already passes a pointer to the device tree, so use it instead to get the memory size (like qemu-riscv does).
TEST=Compile for SPIKE-RISCV and run (cmdline: spike -m1024 build/coreboot.elf)
Change-Id: I5c826ab5e4896e07a78632d5d594377a3d6a7a43 Signed-off-by: joel.bueno joel.bueno@openchip.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/86588 Reviewed-by: Carlos López carlos.lopezr4096@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Maximilian Brune maximilian.brune@9elements.com --- M src/soc/ucb/riscv/Kconfig M src/soc/ucb/riscv/cbmem.c 2 files changed, 10 insertions(+), 1 deletion(-)
Approvals: Maximilian Brune: Looks good to me, approved Carlos López: Looks good to me, but someone else must approve build bot (Jenkins): Verified
diff --git a/src/soc/ucb/riscv/Kconfig b/src/soc/ucb/riscv/Kconfig index bd0945e..e8a8d37 100644 --- a/src/soc/ucb/riscv/Kconfig +++ b/src/soc/ucb/riscv/Kconfig @@ -9,6 +9,7 @@ select ARCH_ROMSTAGE_RISCV select ARCH_RAMSTAGE_RISCV select RISCV_USE_ARCH_TIMER + select FLATTENED_DEVICE_TREE bool default n
diff --git a/src/soc/ucb/riscv/cbmem.c b/src/soc/ucb/riscv/cbmem.c index 5c423a0..ff3f5db 100644 --- a/src/soc/ucb/riscv/cbmem.c +++ b/src/soc/ucb/riscv/cbmem.c @@ -1,10 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <assert.h> #include <cbmem.h> #include <symbols.h> #include <ramdetect.h> +#include <commonlib/device_tree.h> +#include <mcall.h>
uintptr_t cbmem_top_chipset(void) { - return (uintptr_t)_dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB); + uint64_t top; + + top = fdt_get_memory_top((void *)HLS()->fdt); + ASSERT_MSG(top, "Failed reading memory range from FDT"); + + return MIN(top, (uint64_t)4 * GiB - 1); }