[coreboot-gerrit] Change in ...coreboot[master]: soc/amd/stoneyridge: Add ACPI D3Cold support for SD Controller

[Raul Rangel (Code Review)]

Hello Marshall Dawson, Daniel Kurtz, build bot (Jenkins), Daniel Kurtz, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32433

to look at the new patch set (#3).

Change subject: soc/amd/stoneyridge: Add ACPI D3Cold support for SD Controller
......................................................................

soc/amd/stoneyridge: Add ACPI D3Cold support for SD Controller

We need to support entering D3Cold from the OS to work around a bug in
the SDHC where the data lines get stuck always reading zeros.

BUG=b:122749418
TEST=Verified the linux kernel can transition between D3 and D0. Also
verified that the device can suspend and resume and continue to have a
functioning SD controller after.

Change-Id: Ifbf48f20c03a752ce3ff773296b536e92db16a62
Signed-off-by: Raul E Rangel 
---
M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
1 file changed, 28 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/32433/3