Attention is currently required from: Martin Roth, Saurabh Mishra, Subrata Banik.
Ashish Kumar Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/84142?usp=email )
Change subject: src/include: Introducing a new SET_32_BIT_FLAG(x) macro.
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Patch Set 14:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84142/comment/ccc67e10_2ee9985a?usp... :
PS14, Line 7: src/include: Introducing a new SET_32_BIT_FLAG(x) macro.
Remove the . at the end of line.
https://review.coreboot.org/c/coreboot/+/84142/comment/459f8048_7525b605?usp... :
PS14, Line 9: This new macro addition ensures the shift operation does not
This is a generic macro. Please describe the macro here.
For example "This commit introduces the SET_32_BIT_FLAG macro, which generates a 32-bit mask with a specified bit set."
In subsequent lines, the GEN_PMCON_A context is explained in detail.
https://review.coreboot.org/c/coreboot/+/84142/comment/5b44c925_7ab4383a?usp... :
PS14, Line 12: On a 64-bit system, 1ul will typically be 64 bits wide.
: The left shift can accommodate values of x up to 63 without overflowing.
: But `GEN_PMCON_A` register width is 32-bit hence, adding new SET_32_BIT_FLAG(x)
: to limit the register to max 32-bit width.
is this > 72 ?
yes
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