14 Apr
2023
14 Apr
'23
6:01 p.m.
Attention is currently required from: Jason Glenesk, Fred Reitberger, Tim Van Patten, Felix Held.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74378 )
Change subject: vc/amd/fsp/phoenix/platform_descriptors: add PCIe gen 4 link speed ......................................................................
Patch Set 1: -Code-Review
(1 comment)
File src/vendorcode/amd/fsp/phoenix/platform_descriptors.h:
https://review.coreboot.org/c/coreboot/+/74378/comment/2de57c18_eda9809c PS1, Line 194: uint32_t link_speed_capability :2; // See dxio_link_speed_cap
oh, this is a 3 bit field in agesa while it's still a 2 bit field in coreboot. […]
whoops nice catch.
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