Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41050 )
Change subject: mb/asus/p2b: Refactor southbridge ACPI stuff ......................................................................
Patch Set 4: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/41050/4/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/acpi/i82371eb.asl:
https://review.coreboot.org/c/coreboot/+/41050/4/src/southbridge/intel/i8237... PS4, Line 5: falls plural: fall
https://review.coreboot.org/c/coreboot/+/41050/4/src/southbridge/intel/i8237... PS4, Line 31: Name (BUF1, ResourceTemplate () : { : /* PM register ports */ : IO (Decode16, 0x0000, 0x0000, 0x01, 0x40, _Y06) : /* SMBus register ports */ : IO (Decode16, 0x0000, 0x0000, 0x01, 0x10, _Y07) : /* PIIX4E ports */ : /* Aliased DMA ports */ : IO (Decode16, 0x0010, 0x0010, 0x01, 0x10, ) : /* Aliased PIC ports */ : IO (Decode16, 0x0022, 0x0022, 0x01, 0x1E, ) : /* Aliased timer ports */ : IO (Decode16, 0x0050, 0x0050, 0x01, 0x04, ) : IO (Decode16, 0x0062, 0x0062, 0x01, 0x02, ) : IO (Decode16, 0x0065, 0x0065, 0x01, 0x0B, ) : IO (Decode16, 0x0074, 0x0074, 0x01, 0x0C, ) : IO (Decode16, 0x0091, 0x0091, 0x01, 0x03, ) : IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E, ) : IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10, ) : IO (Decode16, 0x0294, 0x0294, 0x01, 0x04, ) : IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x02, ) : IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02, ) : }) : CreateWordField (BUF1, _Y06._MIN, PMLO) : CreateWordField (BUF1, _Y06._MAX, PMRL) : CreateWordField (BUF1, _Y07._MIN, SBLO) : CreateWordField (BUF1, _Y07._MAX, SBRL) : : And (_SB.PCI0.PX43.PM00, 0xFFFE, PMLO) : And (_SB.PCI0.PX43.SB00, 0xFFFE, SBLO) : Store (PMLO, PMRL) : Store (SBLO, SBRL) : Return (BUF1) This block is missing a tab