Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32655 )
Change subject: soc/amd/stoneyridge: Relocate MMIO access of ACPI registers
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Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/32655/4/src/soc/amd/common/block/include/amd...
File src/soc/amd/common/block/include/amdblocks/acpi.h:
https://review.coreboot.org/#/c/32655/4/src/soc/amd/common/block/include/amd...
PS4, Line 38: set_pm1cnt_s5
acpi_set_pm1cnt_s5?
https://review.coreboot.org/#/c/32655/4/src/soc/amd/common/block/s3/s3_resum...
File src/soc/amd/common/block/s3/s3_resume.c:
https://review.coreboot.org/#/c/32655/4/src/soc/amd/common/block/s3/s3_resum...
PS4, Line 24: #include <amdblocks/acpi.h>
Why is this required?
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