[coreboot-gerrit] [S] Change in coreboot[main]: */include/cpu: use unsigned int for number of address bits

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78072?usp=email )

Change subject: */include/cpu: use unsigned int for number of address bits
......................................................................

*/include/cpu: use unsigned int for number of address bits

The number of physical address bits and reserved address bits shouldn't
ever be negative, so change the return type of cpu_phys_address_size,
get_reserved_phys_addr_bits, and get_tme_keyid_bits from int to unsigned
int.

Signed-off-by: Felix Held 
Change-Id: I9e67db6bf0c38f743b50e7273449cc028de13a8c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78072
Tested-by: build bot (Jenkins) 
Reviewed-by: Marshall Dawson 
Reviewed-by: Matt DeVillier 
Reviewed-by: Varshit Pandya 
---
M src/arch/x86/cpu_common.c
M src/arch/x86/include/arch/cpu.h
M src/cpu/intel/common/common_init.c
M src/include/cpu/cpu.h
4 files changed, 6 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Matt DeVillier: Looks good to me, approved
  Marshall Dawson: Looks good to me, but someone else must approve
  Varshit Pandya: Looks good to me, but someone else must approve

diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c
index 60ffd36..9387f3b 100644
--- a/src/arch/x86/cpu_common.c
+++ b/src/arch/x86/cpu_common.c
@@ -44,7 +44,7 @@
    return cpuid_eax(0x80000000);
 }

-int cpu_phys_address_size(void)
+unsigned int cpu_phys_address_size(void)
 {
    if (!(cpu_have_cpuid()))
    	return 32;
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 96cf23b..b24cd23 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -317,10 +317,10 @@
 bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info);

#if CONFIG(CPU_INTEL_COMMON)
-int get_reserved_phys_addr_bits(void);
+unsigned int get_reserved_phys_addr_bits(void);
 #else
 /* Default implementation */
-static inline int get_reserved_phys_addr_bits(void)
+static inline unsigned int get_reserved_phys_addr_bits(void)
 {
    /* Default implementation */
    return 0;
diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c
index ff00f02..55bc59e 100644
--- a/src/cpu/intel/common/common_init.c
+++ b/src/cpu/intel/common/common_init.c
@@ -248,7 +248,7 @@
  * configured in the MSRs according to the capabilities and platform
  * configuration. For instance, after FSP-M.
  */
-static int get_tme_keyid_bits(void)
+static unsigned int get_tme_keyid_bits(void)
 {
    msr_t msr;

@@ -256,7 +256,7 @@
    return msr.hi & TME_ACTIVATE_HI_KEYID_BITS_MASK;
 }

-int get_reserved_phys_addr_bits(void)
+unsigned int get_reserved_phys_addr_bits(void)
 {
    if (!is_tme_supported())
    	return 0;
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index fc662ee..9783976 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -9,7 +9,7 @@
 void cpu_initialize(void);
 uintptr_t cpu_get_lapic_addr(void);
 struct bus;
-int cpu_phys_address_size(void);
+unsigned int cpu_phys_address_size(void);

#if ENV_RAMSTAGE
 #define __cpu_driver __attribute__((used, __section__(".rodata.cpu_driver")))