13 Jan
2020
13 Jan
'20
5:06 p.m.
Gaggery Tsai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38287 )
Change subject: soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38287/2/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/38287/2/src/include/device/pci_ids.... PS2, Line 3401: #define PCI_DEVICE_ID_INTEL_CML_S 0x9B55
Ack
Done
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Gerrit-Project: coreboot
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