Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47899 )
Change subject: mb/google/hatch: Drop use of SPD cache for puff-based variants
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Patch Set 1: Code-Review+1
(1 comment)
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Commit Message:
https://review.coreboot.org/c/coreboot/+/47899/1//COMMIT_MSG@11
PS1, Line 11: it's actually slower than simply letting FSP (vs coreboot)
: read the SPD data via smbus, so drop it.
The original idea is the read speed of SPI rom should faster than reading from smbus and also solvin […]
Shouldn't FSP-M have some logic to decide whether to do a full training?
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