Hello Hung-Te Lin, build bot (Jenkins), Sj Huang, CK HU, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46413
to look at the new patch set (#4).
Change subject: DO-NOT-SUBMIT: Asurada ToT - Coreboot ......................................................................
DO-NOT-SUBMIT: Asurada ToT - Coreboot
Move following changes to the head of the chain: CB:46387 soc/mediatek/mt8192: disable_l2c_sram in ramstage CB:46394 mb/google/asurada: change EC SPI to 3M CB:46386 mb/google/asurada: Add Chrome OS GPIOs CB:46385 mb/google/asurada: enable SPI devices CB:46382 soc/mediatek/mt8192: enable CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE
Merge CB:46383 into CB:46382
Signed-off-by: CK Hu ck.hu@mediatek.com Change-Id: If23898ebc6a1a0bcec910873a07b7470f9aa3dd6 --- M 3rdparty/blobs M README.md 2 files changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/46413/4