[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add Acoustic features

[Furquan Shaikh (Code Review)]

Attention is currently required from: Shaunak Saha, Caveh Jalali, Kane Chen, Nick Vaccaro, Patrick Rudolph.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50870 )

Change subject: soc/intel/tigerlake: Add Acoustic features
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Patch Set 2:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/50870/comment/498a8e26_3e808777 
PS2, Line 9: Expose the following FSP UPD interface into coreboot:
           : - AcousticNoiseMitigation
           : - FastPkgCRampDisable
           : - SlowSlewRateFo
Can you please add the details of why this change is being made? (Basically what was identified in CB:50419)

File src/soc/intel/tigerlake/chip.h:

https://review.coreboot.org/c/coreboot/+/50870/comment/5efec723_b4693d0f 
PS2, Line 187: VR domain
VCCin VR domain?

https://review.coreboot.org/c/coreboot/+/50870/comment/54ef3a72_8e144e68 
PS2, Line 193: FastPkgCRampDisable
Since the UPD is changing, you will have to make the mainboard changes as part of this CL too.

https://review.coreboot.org/c/coreboot/+/50870/comment/a99ba16f_42c9989d 
PS2, Line 197: VR domain
VCCin VR domain