[coreboot-gerrit] Change in coreboot[master]: mb/intel/adlrvp: Update PMC Descriptor for Alder lake A0(906a0h) silicon

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Selma Bensaid, Sridhar Siricilla, Rizwan Qureshi, Subrata Banik, Werner Zeh.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56073 )

Change subject: mb/intel/adlrvp: Update PMC Descriptor for Alder lake A0(906a0h) silicon
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Patch Set 6:

(5 comments)

File src/mainboard/intel/adlrvp/bootblock.c:

https://review.coreboot.org/c/coreboot/+/56073/comment/f7ef4b52_3ee289df 
PS5, Line 20: X
> nit: 0x10?

ack

https://review.coreboot.org/c/coreboot/+/56073/comment/5e0ecfb6_068390a3 
PS5, Line 27: 0xFF0A55A
> nit: […]

ack

https://review.coreboot.org/c/coreboot/+/56073/comment/026be510_c01e1255 
PS5, Line 35: 1
> nit: BIT(0)

ack

https://review.coreboot.org/c/coreboot/+/56073/comment/d84d2d1c_1ee486a5 
PS5, Line 62: if (si_desc_buf[PMC_DESC_7_BYTE3] == 0x40) {
> if (si_desc_buf[PMC_DESC_7_BYTE3] != 0x40) { […]

Ack

https://review.coreboot.org/c/coreboot/+/56073/comment/ca53e21a_dd7f1515 
PS5, Line 78: 1
> nit: true

ack