Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40525 )
Change subject: soc/mediatek/mt8183: Use term settings for high DRAM frequency ......................................................................
Patch Set 8:
(8 comments)
https://review.coreboot.org/c/coreboot/+/40525/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40525/4//COMMIT_MSG@10 PS4, Line 10: max
is larger
Ack
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... PS4, Line 271:
please use only one space (and lines below).
Ack
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... PS4, Line 271: ~(1<<6)
~(1 << 6)
Ack
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... PS4, Line 274: (1<<6)
1 << 6
Ack
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... PS4, Line 278: final_vref | (0x1 << 6)
why don't we do this directly so you don't need to do | 1 << 6 every time? e.g., […]
Ack
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... PS4, Line 278: (0x1 << 6)
1 << 6
Ack
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... PS4, Line 279: (0x1 << 6)
1 << 6
Ack
https://review.coreboot.org/c/coreboot/+/40525/4/src/soc/mediatek/mt8183/dra... PS4, Line 1835: (vref_range << 6)
vref_range << 6
Ack