[coreboot-gerrit] Change in coreboot[master]: libpayload/x86: Try to discover invariant TSC rate

[Nico Huber (Code Review)]

Hello  Felix Singer, build bot (Jenkins), Tim Wawrzynczak, Thomas Heijligen, Angel Pons, Julius Werner, Arthur Heymans, Aaron Durbin,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/34170

to look at the new patch set (#6).

Change subject: libpayload/x86: Try to discover invariant TSC rate
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libpayload/x86: Try to discover invariant TSC rate

We can skip the PIT-based TSC calibration if we can derive the invariant
TSC rate from CPUID/MSR data. This is necessary if the PIT is disabled,
which is the default, for instance, on Coffee Lake CPUs.

This implementation should cover all Intel Core i processors at least.
For older processors, we fall back to the PIT calibration.

Change-Id: Ic6607ee2a8b41c2be9dc1bb4f1e23e652bb33889
Signed-off-by: Nico Huber 
---
M payloads/libpayload/arch/x86/timer.c
1 file changed, 116 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/34170/6