Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34632 )
Change subject: Documentation: Add guidelines for new mainboard ports ......................................................................
Patch Set 3:
(5 comments)
https://review.coreboot.org/c/coreboot/+/34632/3/Documentation/getting_start... File Documentation/getting_started/mainboard_template.md:
https://review.coreboot.org/c/coreboot/+/34632/3/Documentation/getting_start... PS3, Line 24: * 'EVT' : * 'DVT' I find using abbreviations without explanation is a bad style. There is a chance that different people have different understanding for a given abbreviation. Please write the meaning down here.
https://review.coreboot.org/c/coreboot/+/34632/3/Documentation/getting_start... PS3, Line 28: 'EOL' same here
https://review.coreboot.org/c/coreboot/+/34632/3/Documentation/getting_start... PS3, Line 55: Can you flash in-circuit using a SOIC-8 clip? Please add here something to cover the board power supply. Something like:
'Need the ISP programmer provide the flash voltage or need the board be powered for flashing? If the ISP programmer needs to provide the voltage, which value should it have?'
could be helpful. Though part of it is mentioned in the lower section.
https://review.coreboot.org/c/coreboot/+/34632/3/Documentation/getting_start... File Documentation/getting_started/new_mainboard_ports.md:
https://review.coreboot.org/c/coreboot/+/34632/3/Documentation/getting_start... PS3, Line 23: Add a hint here to take care about the ME/TXE on Intel plattforms? Things like 'Has the mainboard one or two SPI flashes for ME and BIOS?' and 'How are the access rights set up in the descriptor?' may influence the final image creation.
https://review.coreboot.org/c/coreboot/+/34632/3/Documentation/getting_start... PS3, Line 63: schematics as well. if these are available.