[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.

[Tim Wawrzynczak (Code Review)]

Hello Aaron Durbin, Patrick Rudolph, Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32791

to look at the new patch set (#7).

Change subject: soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.
......................................................................

soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.

When FSP UPD parameters are configured, also configure the GSPI CS lines
appropriately.  GSPI driver assumes CS0 is the CS signal to use.

BUG=b:130329260
BRANCH=None
TEST=Boot Kohaku, TPM communcation still functional.

Change-Id: Ic816395b7d198a52c704e6cabcb56889150b741c
Signed-off-by: Tim Wawrzynczak 
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 43 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/32791/7