[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAM

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47568 )

Change subject: nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAM
......................................................................

nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAM

Reference code never enables SRT for Sandy Bridge, and only enables it
for Ivy Bridge when the memory frequency is at most 1066 MHz.

Change-Id: I50527f311340584cf8290de2114ec2694cca3a83
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 3 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/47568/1

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 095d853..d166292 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -769,13 +769,14 @@
 {
    u16 pasr, cwl, mr2reg;
    odtmap odt;
-	int srt;
+	int srt = 0;

pasr = 0;
    cwl = ctrl->CWL - 5;
    odt = get_ODT(ctrl, channel);

-	srt = ctrl->extended_temperature_range && !ctrl->auto_self_refresh;
+	if (IS_IVY_CPU(ctrl->cpu) && ctrl->tCK >= TCK_1066MHZ)
+		srt = ctrl->extended_temperature_range && !ctrl->auto_self_refresh;

mr2reg = 0;
    mr2reg = (mr2reg & ~0x07) | pasr;