Arthur Heymans (arthur@aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18371
-gerrit
commit d0bf918f27a3d4baa6f63d1a2c40e6f79dd33fc0 Author: Arthur Heymans arthur@aheymans.xyz Date: Sun Jan 22 21:24:40 2017 +0100
nehalem/Kconfig: Rename TRAINING_CACHE_SIZE to MRC_CACHE_SIZE
This is more consistent with newer Intel targets.
Change-Id: I52ee8d3f0c330a03bd6c18eed08e578dd6ae284b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- src/northbridge/intel/nehalem/Kconfig | 2 +- src/northbridge/intel/nehalem/Makefile.inc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 94ca346..9d3d772 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -49,7 +49,7 @@ config BOOTBLOCK_NORTHBRIDGE_INIT string default "northbridge/intel/nehalem/bootblock.c"
-config TRAINING_CACHE_SIZE +config MRC_CACHE_SIZE hex default 0x10000
diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc index 17bbaff..b5c19ff 100644 --- a/src/northbridge/intel/nehalem/Makefile.inc +++ b/src/northbridge/intel/nehalem/Makefile.inc @@ -31,7 +31,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
$(obj)/mrc.cache: dd if=/dev/zero count=1 \ - bs=$(shell printf "%d" $(CONFIG_TRAINING_CACHE_SIZE) ) | \ + bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \ tr '\000' '\377' > $@
cbfs-files-y += mrc.cache