[coreboot-gerrit] [XS] Change in coreboot[main]: vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos

[Nick Kochlowski (Code Review)]

Nick Kochlowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85819?usp=email )

Change subject: vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos
......................................................................

vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos

Fix the typo in the word "unknown", and add 1 to the timepoint enum to
print out 1, 2 and 3 instead of 0, 1 and 2.

Change-Id: I1308fd102490a89ff8b724509917180034d8d0c0
Signed-off-by: Nicolas Kochlowski 
---
M src/vendorcode/amd/opensil/genoa_poc/ramstage.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/85819/1

diff --git a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c
index b1bbc07..bb3cad1 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c
+++ b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c
@@ -18,7 +18,7 @@
 void SIL_STATUS_report(const char *function, const int status)
 {
    const int log_level = status == SilPass ? BIOS_DEBUG : BIOS_ERR;
-	const char *error_string = "Unkown error";
+	const char *error_string = "Unknown error";

const struct error_string_entry {
    	SIL_STATUS status;
@@ -151,7 +151,7 @@
    	return;
    }
    char opensil_function[16];
-	snprintf(opensil_function, sizeof(opensil_function), "InitializeSiTp%d", tp);
+	snprintf(opensil_function, sizeof(opensil_function), "InitializeSiTp%d", tp + 1);
    SIL_STATUS_report(opensil_function, ret);
    if (ret == SilResetRequestColdImm || ret == SilResetRequestColdDef) {
    	printk(BIOS_INFO, "openSIL requested a cold reset");