Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18297
-gerrit
commit b1f580f4af760fc960686cc20fb74360b0dcbfe5 Author: Yuji Sasaki sasakiy@google.com Date: Thu Jan 26 10:17:45 2017 -0800
qualcomm/ipq40xx: add vector operation method
Adding spi_xfer_two_vectors as .xfer_vector for ipq40xx spi_ctrlr. Commit 22e7b86790fa ("UPSTREAM: spi: Get rid of SPI_ATOMIC_SEQUENCING") has added new driver method xfer_vector to support combined write-read operation within single CS cycle. The metohd is wrapped in spi_xfer_vector() API. When spi_ctrlr structure does not have xfer_vector method, API calls write and read operations sequentially. However the QCA40xx SPI driver has "forced" CS activation-inactivation in xfer method, so individual operation will break CS after write operation, making combined write-read cycle broken. Adding xfer_vector method to spi_ctrlr is quick fix to prevent this.
BUG=None BRANCH=none TEST=built and run on Gale
Change-Id: I2258e563d0793bcacd626f78b8e96b3649a8e4a4 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 88a8824951cef4fe293dfa6e3a1a837ae07b6156 Original-Change-Id: I031e85ce5b847353cb1084f6f68b2af8c6f702e1 Original-Signed-off-by: Yuji Sasaki sasakiy@google.com Original-Reviewed-on: https://chromium-review.googlesource.com/433439 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org Original-Reviewed-by: Kan Yan kyan@google.com --- src/soc/qualcomm/ipq40xx/spi.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c index 6d044b3..68c2dd0 100644 --- a/src/soc/qualcomm/ipq40xx/spi.c +++ b/src/soc/qualcomm/ipq40xx/spi.c @@ -656,6 +656,7 @@ static const struct spi_ctrlr spi_ctrlr = { .claim_bus = spi_ctrlr_claim_bus, .release_bus = spi_ctrlr_release_bus, .xfer = spi_ctrlr_xfer, + .xfer_vector = spi_xfer_two_vectors, };
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)